OPPapers.com

Floating Point Coprocessors

Floating Point Coprocessors


The designer of any microprocessor would like to extend its instruction
set almost infinitely but is limited by the quantity of silicon available (not
to mention the problems of testability and complexity). Consequently, a real
microprocessor represents a compromise between what is desirable and what is
acceptable to the majority of the chip's users. For example, the 68020
microprocessor is not optimized for calculations that require a large volume of
scientific (i.e. floating point) calculations. One method to significantly
enhance the performance of such a microprocessor is to add a coprocessor. To
increase the power of a microprocessor, it does not suffice to add a few more
instructions to the instruction set, but it involves adding an auxiliary
processor that works in parallel to the MPU (Micro Processing Unit). A system
involving concurrently operating processors can be very complex, since there
need to be dedicated communication paths between the processors, as well as
software to divide the tasks among them. A practical multiprocessing system
should be as simple as possible and require a minimum overhead in terms of both
hardware and software. There are various techniques of arranging a coprocessor
alongside a microprocessor. One technique is to provide the coprocessor with an
instruction interpreter and program counter. Each instruction fetched from
memory is examined by both the MPU and the coprocessor. If it is a MPU
instruction, the MPU executes it; otherwise the coprocessor executes it. It can
be seen that this solution is feasible, but by no means simple, as it would be
difficult to keep the MPU and coprocessor in step. Another technique is to equip
the microprocessor with a special bus to communicate with the external
coprocessor. Whenever the microprocessor encounters an operation that requires
the intervention of the coprocessor, the special bus provides a dedicated high-
speed communication between the MPU and the...