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Cryptography

Tomorrow's Cryptography:

Parallel Computation via Multiple Processors, Vector

Processing, and Multi-Cored Chips
Eric C. Seidel, advisor Joseph N. Gregg PhD

December 30, 2002

Abstract. This paper summarizes my research during my independent study on cryptography

in the fal l term of 2002. Here I state the growing need for better cryptography, introduce con-

sumer hardware architectures of near future, and identify the growing discrepancy between

the hardware on which current cryptographic standards were designed and the hardware the

future consumer wil l be using. I note then the need for a new "modern" cryptography based

on the presence of paral lel processing capabilities in forthcoming consumer machines and the

lack of support of such capabilities in some current and al l legacy crypto algorithms. I list

approaches used in past research to paral lelize cryptographic algorithms. I then summarize

various current algorithms and potential implementation changes to ready them for tomor-

row's machines. I conclude with some brief discussion of newer cryptographic algorithms,

particularly AES and AES finalists and how they wil l fare on the machines of the future.

Eric.C.Seidel@lawrence.edu; Joseph.N.Gregg@lawrence.edu

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Contents

1 The future of crypto 3

2 Parallel crypto of to day 6

3 The imp ortance of data-level changes 8

4 Making data-level changes 9

4.1 Hashing Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.1.1 MD5 - Message Digest 5 . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1.2 SHA-1,...